Open topic with navigation

Polarity and phase

Correct configuration of the polarity and phase is important for error-free operation of the SSI interface. The polarity setting is determined by the resting level of the SSI clock line. If the clock line rests at a Low level, parameter
P 2803 TOPT_SSI_Polarity should be set to "False". "True" means the clock level rests at "High" level. The phase indicates the time at which a new bit is connected to the data line, and the time at which it is to be evaluated. If parameter P 2804 TOPT_SSI_Phase is set to False, the data are always applied back to the resting level at the edge. If the setting is "True", the data are applied away from the resting level at the edge.

Polarity	Phase	Clock and data line
False	False
False	True
True	False
True	True
data

Tabelle: Parameterization of polarity and phase

	Bit change
	Data transfer

Suffixing a parity bit

A parity bit can optionally be suffixed after the user data. The parity bit is then transferred after the least significant bit (LSB). The parity bit is enabled by way of parameter P 2805 TOPT_SSI_ParityEnable. The parity can be set either as "odd" or "even". This can be selected by way of parameter P 0208 TOPT_SSI_Parity-Type.

Use of synchronization

Where the SSI information is scanned at equidistant time intervals, it is possible to synchronize the control cycle of the ServoOne to the scan cycle. The synchronization is executed to the first clock edge of a transfer.

When using synchronized mode, it is important that the read cycle of the control system is an integer multiple of the speed control cycle. Synchronized scanning ensures that position values polled at the equidistant time intervals can be transferred to the higher-level PLC. If multiple synchronized ServoOne units were scanned simultaneously, all actual position values would be generated at the same time. Synchronization is enabled by way of parameter P 2808 TOPT_SSI_SyncUse. Parameter P 2809 TOPT_SSI_InSync displays the synchronization status.